Deep Submicron VLSI Design

16:332:578 Deep Submicron VLSI Design and 14:332:482 Deep Submicron VLSI Design, Spring 2008
  Your final grades are now on sakai. For the 0.18 micron technology, use the TSMC 0.2u technology. Also, the names of the nFET and pFET models for Spectre are TSMC20P and TSMC20N.
Instructor:
Prof. Michael L. Bushnell (bushnell@caip.rutgers.edu)
Phone: (732) 445-4854 or (732) 445-6400 X214 FAX: (732) 445-4775
Lecture time: Mon. and Wed. 3:20 p.m. - 4:40 p.m.
Classroom: CORE 538
Course Laboratory: CORE 533 & CORE 601A
Office Hours: Tues. and Thurs. 12:30 p.m. - 3:30 p.m.


Instructions for using the Large Color Plotter: word

Syllabus for Undergraduate Students: postscript / pdf

Syllabus for Graduate Students: postscript / pdf

Instructions for Using the Cadence System: postscript / pdf

Instructions for Using the Verilog Test Generator: postscript / pdf See Omar Khan or Mike Bushnell if you have problems.

Instructions for Using the Synopsys System: postscript / pdf

Requirements for the Short Chip Project: WORD

Wallace's Paper on High-Speed Multiplication and Division: (pdf)

Project description for VLSI course (graduate students only): (postscript / pdf)

Sample Final Project Presentation (graduate students only): (powerpoint)

Sample Final Project Writeup (graduate students only): (word)

Project status (graduate students only): (pdf)

Paper on Moore's Law: (pdf)

Powerpoint Lecture Notes:

Assignments (Undergraduate and Graduate):

Note: Any questions about this site, please email: bushnell@caip.rutgers.edu