Corrections to Edition 1 of "Low-Power CMOS VLSI Circuit Design" by
Kaushik Roy and Sharat Prasad, Copyright 2000, Wiley-Interscience

1.  Page 23, Equation (2.33), left hand side should read partial of Ex with
    respect to x.
2.  Page 32, first line should read,
    "Solving Vin (0) = 0, Vin (t1) = VT, and Vin (t2 = VDD/2), we obtain ..." 
3.  Page 32, Equation (2.56), Integration should be with respect to
    Theta squared d Theta
4.  Page 35, Equation (2.66), Instead of "CL || Cint" this should read
    "CL in series with Cint"
5.  Page 35, Figure 2.17, The sources of M1 (in both circuits) and M3 should
    be pulled up to VDD.  Also, in the second circuit, the capacitors on the
    input Vi should be connected to the drain of M1 and the drain of M2.
6.  Page 36, Last line in Section 2.3.3.1, "width" should instead be "length".
7.  Page 42, 12th line of Section 2.4.4, Epsilon c should instead be E c.
8.  Page 42, 3rd Equation on page, Epsilon m should be defined as the
    dielectric constant of the material being used.
9.  Page 64, 4th line after Equation (3.12), should read:
    "P (xj (t - T) ..."
10. Page 87, 2nd line, should read
    "states given by {s1 s0, s1 (bar) s0 (bar) } and 
    {s1 (bar) s0, s1 s0 (bar)} ..."
11. Page 94, Table 3.5, is incorrect.  The last 4 lines should read:
    SH0 -- Static  0 hazard {0100, 0010, 0110}
    SH1 -- Static  1 hazard {1011, 1101, 1001}
    DH0 -- Dynamic 0 hazard {1010}
    DH! -- Dynamic 1 hazard {0101}
12. Page 116, Figure 3.36, in the n-tree, the left transistor of the two
    NFETs in parallel is incorrectly labeled at the gate as X3.  It should
    be labeled as X1.
13. Page 117, top, Item # 2.  This refers to Figure 1.14, but perhaps it 
    should instead refer to Figure 3.36.
14. Page 117, 2nd paragraph, 5th line, This refers to Figure 1, but perhaps
    it should instead refer to Figure 3.36.
15. Page 132, 2nd line from bottom, should read
    "Figure 3.42 (unit-delay model) ..."
16. Page 133, 2nd line, should read
    "... Similar results are also true for the fanout-delay model, ..."
17. Page 159, 11th line should read
    "... For simplicity, let I = 2 ** (l - 1), where I is ..."
18. Page 192, line 30, "xorresponding" should be "corresponding"
19. Page 206, Figure 5.5, Part (a), the bottom output should be labeled as
    A (bar) B, not AB (bar).  In Part (b), the top output should be labeled
    as A XOR B, and the bottom output should be labeled as A XNOR B.
20. Page 302, Section 7.3.8.2, 2nd line, "need" should be "needs"
21. Page 304, 3rd line, "transition" should be "transitions"
22. Page 328, 5th line, should read
    "... evaluates the expression (x y) + z,"
23. Page 324, line 14, "required" should be "requiring"