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Digital System Design, Fall 2009
14:332:437 Digital System Design, Fall 2009
Homework 7 and its test bench have been assigned on this web site. Exam 2 is on Monday (tomorrow), 11/23/09 in class. Coverage is the entire course except for circuit testing. The solution to the 2007 Exam 2 is now on this web site. Your Practicum 1 has been graded and most results are on Sakai. Also, you may pick up practicum solutions on the table outside of CORE 624. We have one Problem Set 1 with no name. See M. Bushnell to claim it. Problem Sets 3, 4, and 5 have been posted on this web site. Welcome to Digital Systems Design for the Fall of 2009! Problem Sets, their Solutions, graded homework, and Exams can be picked up on the table outside of CORE 624.
Instructor:
Prof. Michael Bushnell (bushnell@caip.rutgers.edu)
Phone: (609) 865-9590
Lecture time: Mon., Wed. 3:20-4:40
Classroom: ARC-105 (Allison Road Classroom Bldg.)
Course Laboratory: EE 103 UNIX Work Station Rooms
Office Hourse: Tues. and Thurs., 11:30 a.m. to 2:15 p.m.
Teaching Assistant
Fei Xiang (feixiang@eden.rutgers.edu)
Administrative
Contact:
Lynn
Ruggiero (ruggiero@ece.rutgers.edu)
Phone: (732) 445-5241
Texts:
- Self-Checking and Fault-Tolerant Digital Design,
by Lala, Academic Press/HBJ, ISBN # 0-12-434370-8
- The Verilog Hardware Description Language, by Don Thomas and Philip Moorby, Kluwer, 2003, ISBN # 1-4020-7089-6
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Optional Text: Logic Design & Switching Theory, by Muroga, Krieger Publishing Co., ISBN # 1-57524-036-X
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Optional Text: Essentials of Electronic Testing for Digital, Memory, & Logic VLSI Circuits, by Bushnell and Agrawal, Springer, 2000, ISBN # 0-7923-7991-8
Synopsys Operating Instructions: postscript pdf
Course Syllabus: postscript pdf
Errors in Lala textbook: postscript pdf
Verilog Do's and Don'ts: postscript pdf
1996 First Examination for study -- test and solution
1997 Final Examination for study -- test and solution
1998 Final Examination for study -- test and solution
2007 Examination 2 for study -- test and solution
A Company Called IBM -- Used with permission from International Business Machines Corp.
"Error Detecting and Error Correcting Codes," by Richard W. Hamming, Bell System Technical Journal, 29(2): 16-29, 1950.
"A Signed Binary Multiplication Technique," by Andrew D. Booth, Quarterly Journal of Mechanical Applied Mathematics, 4: 236-240, 1951.
"A Logic for High-Speed Addition," by A. Weinberger and J. L. Smith, National Bureau of Standards Circular 591, pp 3-12, 1958.
"A Suggestion for a Fast Multiplier," by C. S. Wallace, IEEE Transactions on Electronic Computers, EC-13: 14-17, 1964.
Powerpoint Lecture Notes:
- Lecture 1 Fault Tolerance (powerpoint, 40 slides)
- Lecture 2 Fault Tolerance Examples (powerpoint, 33 slides)
- Lecture 3 Hardware Design Methodology and Advanced Logic Design (powerpoint, 23 slides)
- Lecture 4 Variable-Entered Karnaugh Maps and Mixed-Logic Design (powerpoint, 33 slides)
- Lecture 5 Verilog Tutorial (powerpoint, 24 slides)
- Lecture 6 Verilog Behavioral Modeling and Concurrency (powerpoint, 33 slides)
- Lecture 7 Verilog Hardware Description Language Basics (powerpoint, 19 slides)
- Lecture 8 Verilog and Finite State Machines (powerpoint, 23 slides)
- Lecture 9 Verilog Example (powerpoint, 31 slides) Verilog Code
- Lecture 10 Verilog Language Details (powerpoint, 29 slides)
- Lecture 11 Verilog Event-Driven Simulation (powerpoint, 41 slides)
- Lecture 12 Finite State Machine Design (powerpoint, 47 slides)
- Lecture 13 FSM Asynchronous Inputs, CLocks, and Hazards (powerpoint, 45 slides)
- Lecture 14 Turing Machines and State Machine Sequences (powerpoint, 18 slides)
- Lecture 15 System Controller Design (powerpoint, 18 slides)
- Lecture 16 FSM Synchronizers (powerpoint, 18 slides)
- Lecture 17 FSM Hardware Modification for Reliability (powerpoint, 20 slides)
- Lecture 18 Advanced Synchronizers (powerpoint, 18 slides)
- Lecture 19 Time Redundancy (powerpoint, 31 slides)
- Lecture 20 Information Redundancy (powerpoint, 40 slides)
- Lecture 21 Cyclic and Hamming Codes (powerpoint, 50 slides)
- Lecture 22 Computer Arithmetic (powerpoint, 29 slides)
- Lecture 23 Introduction to Testing (powerpoint, 32 slides)
- Lecture 24 Testing Methods (powerpoint, 39 slides)
- Lecture 25 Built-In Self-Testing (powerpoint, 26 slides)
- Lecture 26 IEEE Boundary Scan Standard and System Test (powerpoint, 32 slides)
- Lecture 27 Packaging (powerpoint, 5 slides)
Assignments:
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Note: Any questions about this
site, please email: bushnell@caip.rutgers.edu