module testbench (output reg [0:2] a, output reg oe, input [0:7] z);

initial
begin
  $dumpfile ("mysigs.dump");
  $dumpvars;
  oe = 1;
  a = 7;
#10 
  oe = 0;
  a = 0;
#10 
  a = 1;
#10 
  a = 2;
#10 
  a = 3;
#10 
  a = 4;
#10 
  a = 5;
#10 
  a = 6;
#10 
  a = 7;
#10
  oe = 1;   
  a = 0;
#10
  a = 1;
#10
  $finish;
end
endmodule