16:332:576 Testing of ULSI Circuits, Spring 2008
16:332:576: Testing of ULSI Circuits, Spring 2008
Final grades are now on sakai, and they have changed for some people. Thank you for contributing to an enjoyable course!
The Wavelet ATPG instructions have been corrected, and they are now on this web site, so try running it again, and report any problems to me. During this term, I will be starting to revise the testing textbook, so please give me all of your suggestions for improvements!
Instructor:
Prof. Michael L. Bushnell (bushnell@ecaip.rutgers.edu)
Phone: (732) 445-6400 X214 FAX: (732) 445-4775
Lecture time: Fri. 6:40 p.m. - 9:30 p.m.
Classroom: CORE 538
Course Laboratory: CORE 533 & CORE 601A
Office Hours: Tuesday, Thursday, 1:30-4:30 p.m.
Textbook: Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits, Authors: Michael L. Bushnell and Vishwani D. Agrawal, 3rd Printing
Table of Contents (postscript or pdf) /
Preface (postscript or pdf)
Bibliography (postscript or pdf) /
Index (postscript or pdf)
CORRECTIONS (applicable to First and Second Printings)
Available now: How to order from Springer Publishers
Syllabus: postscript / pdf
Wavelet ATPG Users' Guide: postscript / pdf
Homework Assignments
Homework 1
Homework 2
Homework 3
Homework 4
Homework 5
Homework 6
Homework 7
Homework 8
Homework 9
Homework 10
Homework 11
Homework 12
Homework 13
Class Projects
Rutgers Verilog Parser User's Manual ( pages) / postscript / pdf
Rutgers Modeling Language (rutmod) User's Manual (14 pages) / postscript / pdf
Example of Rutgers Modeling Language CAD tool in ~bushnell/docum/arpa/deliver/scanchaininserter (a scan chain inserter tool)
Instructions for Using the Cadence System (14 pages): postscript / pdf
Instructions for Using the Synopsys System: postscript / pdf
Powerpoint Lecture Notes (anyone may download and freely use these):
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Lecture 1: Introduction (powerpoint, 16 slides, 1/25/08)
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Lecture 2: Test Process and ATE (powerpoint, 43 slides, 1/25/08)
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Lecture 3: Test Economics (powerpoint, 16 slides, 2/1/08)
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Lecture 4: Yield Analysis & Product Quality (powerpoint, 15 slides, 2/1/08)
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Lecture 5: Fault Modeling (powerpoint, 18 slides, 2/1/08)
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Lecture 6: Logic Simulation (powerpoint, 15 slides, 2/8/08)
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Lecture 7: Fault Simulation (powerpoint, 20 slides, 2/8/08)
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Lecture 8: Testability Measures (powerpoint, 36 slides, 2/15/08)
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Lecture 9: Combinational ATPG Basics (powerpoint, 26 slides, 2/15/08)
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Lecture 10: Redundancy Removal using ATPG (powerpoint, 9 slides, 2/15/08)
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Lecture 11: Major Combinational ATPG Algorithms (powerpoint, 68 slides, 2/22/08)
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Lecture 12: Advanced Combinational ATPG Algorithms (powerpoint, 57 slides, 2/22/08)
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Lecture 13: Seq. Circuit ATPG - Time-Frame Expansion (powerpoint, 22 slides, 2/29/08)
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Lecture 14: Seq. Circuit ATPG - Simulation-Based Methods (powerpoint, 25 slides, 2/29/08)
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Lecture 15: Memory Test (powerpoint, 65 slides, 3/7/08)
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Lecture 16: Pattern Sensitive and Electrical Memory Test (powerpoint, 33 slides, 3/7/08)
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Lecture 17: Analog Circuit Test - A/D and D/A Converters (powerpoint, 34 slides, 3/14/08)
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Lecture 18: DSP-Based Analog Circuit Testing (powerpoint, 57 slides, 3/14/08)
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Lecture 19: Fault Model Based Structural Analog Testing (powerpoint, 33 slides, 3/14/08)
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Lecture 20: Delay Test (powerpoint, 25 slides, 3/28/08)
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Lecture 21: IDDQ Current Testing (powerpoint, 39 slides, 3/28/08)
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Lecture 22: Delta-IDDQ Testing and Built-In Current Testing (powerpoint, 18 slides, 3/28/08)
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Lecture 23: Design for Testability - Full Scan (powerpoint, 22 slides, 4/4/08)
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Lecture 24: Design for Testability - Partial Scan & Scan Variations (powerpoint, 20 slides, 4/4/08)
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Lecture 25: BIST Pattern Generation & Response Compaction (powerpoint, 59 slides, 4/11/08)
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Lecture 26: Logic BIST Architectures (powerpoint, 27 slides, 4/18/08)
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Lecture 27: Memory and Delay Fault BIST (powerpoint, 31 slides, 4/18/08)
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Lecture 28: IEEE 1149.1 JTAG Boundary Scan Standard (powerpoint, 32 slides, 4/25/08)
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Lecture 29: Advanced Boundary Scan and BSDL (powerpoint, 21 slides, 4/25/08)
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Lecture 30: IEEE 1149.4 Analog Test Access Port Standard (powerpoint, 34 slides, 4/25/08)
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Lecture 31: System Test (powerpoint, 22 slides, 5/2/08)
Last modified: Tues. Jan. 28, 2008.
Note: Any questions about this
site, please email: bushnell@caip.rutgers.edu