Your final grades for the CAD Digital VLSI Design Course have been reported. The Wavelet ATPG documentation has been added to this web site.
We have discovered that if you follow directions for the Virtuoso layout editor and give the signal names VDD! and GND! to signals in the layout, the Spectre netlister rewards you by aborting with a "printf" error. Therefore, use the signal names VDD and GND, instead. Until further notice, please use only the nmos4 and pmos4 transistors from the Rutgers_Analog_Parts library in your digital circuits. These are the only ones guaranteed to work with Spectre.
ProfessorsProf. Michael L. Bushnell (bushnell@caip.rutgers.edu)
Phone: (732) 445-4854 FAX: (732) 445-4775
Lecture time: Mon. and Wed. 5:00 p.m. - 6:20 p.m.
Classroom: CORE 538
Course Laboratory: CORE 533 & CORE 601A
Office Hours: Tues. and Thurs. 1:30 p.m. - 4:30 p.m.
Prof. Tapan J. Chakraborty (tchakraborty@alcatel-lucent.com)
Phone: (973) 386-2443 FAX: (732) 445-4775
Office Hours: Mon. and Wed. 6:30 p.m. - 7:30 p.m.