Log for development on the H8

Makefile:

• Compile the assembly part of the code : l.S --> l.o
• Compile the main code : Main.c --> Main.o
• Generate binary linking those objects : ld -Ttext 0xF780 -Th8300.ld l.o Main.o -o Main
• Convert this compiler defined binary formatted output to an SRecord using objcopy.

h8300.ld:

• .text represents where the actual text code will be located.
  
• .data represents whrere the initialized variables will go (in memory).
  
• .bss represents where the uninitialized variables are destined to.
  

h8300.Map:

l.S:

iodefine.h:

H8BootSCI.c:

Bits.c:

On_Off.c:

SCI3.c:

    SCI3.SCR3.BIT.RE=1;
    SCI3.SCR3.BIT.TE=1;
    //TRANSMIT
    SCI3.TDR=b;    
    //LOOP UNTIL TRANSMIT ENDS
    while(SCI3.SSR.BIT.TEND!=1);
    //LOOP UNTIL RECEIVE HAPPENS
    while(SCI3.SSR.BIT.RDRF==0);
    SCI3.SCR3.BIT.RE=1;

Inline Assembly Notes

asm volatile ("instr op1,op2" :
              output :
              inputs :
              clobber list);

The inputs are determined by the operand numbers %0,%1...

  asm volatile("mov.w %0,@%1" ::
	       "r" (data),"r" (ram_address));

  asm volatile("mov.w @%0,%1"::"r" (ram_address),"r" (data));

asm("bset %1,%0" : :"m" (dst) , "g" (bitno));

  asm volatile("add.w %0,%1":"=r"(b):"r"(a),"r"(b));

extern void func() __attribute__(section("bar"));

Writing to Flash

Interrupts Handling

void *INT_Vectors[] __attribute__((section(".vectors"))) = {
        ....
	// 7 NMI 
	(void *) INT_NMI,
	// 8 TRAP
	(void *) INT_TRAP1,
	// 9 TRAP
	(void *) INT_TRAP2,
	...};

SECTIONS
{
	.vectors 0x0000 :
	{
	  *(.vectors)
	} >rom
	...

...
extern void INT_NMI(void) __attribute__((interrupt_handler));
// vector 8 TRAP
extern void INT_TRAP1(void) __attribute__((interrupt_handler));
// vector 9 TRAP
extern void INT_TRAP2(void) __attribute__((interrupt_handler));
...

...
void INT_NMI(void) {/* sleep(); */}
// vector 8 TRAP
void INT_TRAP1(void) {/* sleep(); */}
// vector 9 TRAP
void INT_TRAP2(void) {/* sleep(); */}
...

Links

Documentation

Kernels